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Design and test technology for depen...
~
Vierhaus, Heinrich Theodor, (1951-)
Design and test technology for dependable systems-on-chip
紀錄類型:
書目-電子資源 : 單行本
正題名/作者:
Design and test technology for dependable systems-on-chip/ Raimund Ubar, Jaan Raik, and Heinrich Theodor Vierhaus, editors.
其他作者:
Vierhaus, Heinrich Theodor,
出版者:
Hershey, Pa. :IGI Global (701 E. Chocolate Avenue, Hershey, Pennsylvania, 17033, USA), : c2011.,
面頁冊數:
xxv, 550 p. :ill. ; : 29 cm.;
標題:
Networks on a chip - Testing. -
電子資源:
http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/978-1-60960-212-3
ISBN:
9781609602147 (ebook)
Design and test technology for dependable systems-on-chip
Design and test technology for dependable systems-on-chip
[electronic resource] /Raimund Ubar, Jaan Raik, and Heinrich Theodor Vierhaus, editors. - Hershey, Pa. :IGI Global (701 E. Chocolate Avenue, Hershey, Pennsylvania, 17033, USA),c2011. - xxv, 550 p. :ill. ;29 cm.
Includes bibliographical references.
Covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC).
Mode of access: World Wide Web.
ISBN: 9781609602147 (ebook)Subjects--Topical Terms:
240579
Networks on a chip
--Testing.Subjects--Index Terms:
Built-in self repair for logic structures
LC Class. No.: TK7895.E42 / D467 2011e
Dewey Class. No.: 621.3815
Design and test technology for dependable systems-on-chip
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http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/978-1-60960-212-3
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