語系:
繁體中文
English
說明(常見問題)
回圖書館
登入
回首頁
切換:
標籤
|
MARC模式
|
ISBD
Dynamic reconfigurable network-on-ch...
~
Hsiung, Pao-Ann.
Dynamic reconfigurable network-on-chip design = innovations for computational processing and communication /
紀錄類型:
書目-電子資源 : 單行本
正題名/作者:
Dynamic reconfigurable network-on-chip design/ Jih-Sheng Shen and Pao-Ann Hsiung [editors].
其他題名:
innovations for computational processing and communication /
其他作者:
Shen, Jih-Sheng,
出版者:
Hershey, Pa. :IGI Global (701 E. Chocolate Avenue, Hershey, Pennsylvania, 17033, USA), : c2010.,
面頁冊數:
xvii, 366 p. :ill. ; : 29 cm.;
標題:
Networks on a chip. -
電子資源:
http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/978-1-61520-807-4
ISBN:
9781615208081 (ebook)
Dynamic reconfigurable network-on-chip design = innovations for computational processing and communication /
Dynamic reconfigurable network-on-chip design
innovations for computational processing and communication /[electronic resource] :Jih-Sheng Shen and Pao-Ann Hsiung [editors]. - Hershey, Pa. :IGI Global (701 E. Chocolate Avenue, Hershey, Pennsylvania, 17033, USA),c2010. - xvii, 366 p. :ill. ;29 cm.
Includes bibliographical references.
Reconfigurable computing brings immense flexibility to on-chip processing while network-on-chip has improved flexibility in on-chip communication. Integrating these two areas of research reaps the benefits of both and represents the promising future of multiprocessor systems-on-chip. This book is the one of the first compilations written to demonstrate this future for network-on-chip design. Through dynamic and creative research into questions ranging from integrating reconfigurable computing techniques, to task assigning, scheduling and arrival, to designing an operating system to take advantage of the computing and communication flexibilities brought about by run-time reconfiguration and network-on-chip, it represents a complete source of the techniques and applications for reconfigurable network-on-chip necessary for understanding of future of this field.
Mode of access: World Wide Web.
ISBN: 9781615208081 (ebook)Subjects--Topical Terms:
241188
Networks on a chip.
Subjects--Index Terms:
Administration of reconfigurable NoCs
LC Class. No.: TK5105.546 / .D96 2010e
Dewey Class. No.: 621.3815/31
Dynamic reconfigurable network-on-chip design = innovations for computational processing and communication /
LDR
:02404nmm a2200385 a 4500
001
169769
003
CaBNvSL
005
19991118134550.0
008
160302s2010 paua fsb 000 0 eng d
010
$z
2009052397
020
$a
9781615208081 (ebook)
020
$a
9781615208074 (hardcover)
020
$a
9781616923204 (pbk.)
035
$a
(CaBNvSL)gtp00543784
035
$a
00000357
040
$a
CaBNvSL
$c
CaBNvSL
$d
CaBNvSL
050
4
$a
TK5105.546
$b
.D96 2010e
082
0 4
$a
621.3815/31
$2
22
245
0 0
$a
Dynamic reconfigurable network-on-chip design
$h
[electronic resource] :
$b
innovations for computational processing and communication /
$c
Jih-Sheng Shen and Pao-Ann Hsiung [editors].
260
$a
Hershey, Pa. :
$c
c2010.
$b
IGI Global (701 E. Chocolate Avenue, Hershey, Pennsylvania, 17033, USA),
300
$a
xvii, 366 p. :
$b
ill. ;
$c
29 cm.
504
$a
Includes bibliographical references.
520
3
$a
Reconfigurable computing brings immense flexibility to on-chip processing while network-on-chip has improved flexibility in on-chip communication. Integrating these two areas of research reaps the benefits of both and represents the promising future of multiprocessor systems-on-chip. This book is the one of the first compilations written to demonstrate this future for network-on-chip design. Through dynamic and creative research into questions ranging from integrating reconfigurable computing techniques, to task assigning, scheduling and arrival, to designing an operating system to take advantage of the computing and communication flexibilities brought about by run-time reconfiguration and network-on-chip, it represents a complete source of the techniques and applications for reconfigurable network-on-chip necessary for understanding of future of this field.
538
$a
Mode of access: World Wide Web.
650
0
$a
Networks on a chip.
$3
241188
653
$a
Administration of reconfigurable NoCs
653
$a
Leveraging reconfiguration techniques
653
$a
Low-power network-on-chip
653
$a
Network-on-chip design flow
653
$a
NoC-based Infrastructures
653
$a
Operating system design
653
$a
Programming models for the processing elements
653
$a
Reconfigurable computing techniques
653
$a
Reconfiguring the network-on-chip processing elements
653
$a
Task scheduling
700
1
$a
Shen, Jih-Sheng,
$d
1980-
$3
331203
700
1
$a
Hsiung, Pao-Ann.
$3
331202
710
2
$a
IGI Global.
$3
225644
776
0
$c
(Original)
$z
9781615208074
$w
(DLC) 2009052397
856
4 8
$3
Chapter PDFs via platform:
$u
http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/978-1-61520-807-4
筆 0 讀者評論
多媒體
評論
新增評論
分享你的心得
Export
取書館別
處理中
...
變更密碼
登入