語系:
繁體中文
English
說明(常見問題)
回圖書館
登入
回首頁
切換:
標籤
|
MARC模式
|
ISBD
The power of assertions in SystemVerilog
~
SpringerLink (Online service)
The power of assertions in SystemVerilog
紀錄類型:
書目-電子資源 : 單行本
正題名/作者:
The power of assertions in SystemVerilog/ by Eduard Cerny ... [et al.].
其他作者:
Cerny, Eduard.
出版者:
Boston, MA :Springer US, : 2010.,
面頁冊數:
xvii, 544 p. :ill., digital ; : 24 cm.;
Contained By:
Springer eBooks
標題:
Electrical Engineering. -
電子資源:
http://dx.doi.org/10.1007/978-1-4419-6600-1
ISBN:
9781441966001 (electronic bk.)
The power of assertions in SystemVerilog
The power of assertions in SystemVerilog
[electronic resource] /by Eduard Cerny ... [et al.]. - Boston, MA :Springer US,2010. - xvii, 544 p. :ill., digital ;24 cm.
ISBN: 9781441966001 (electronic bk.)Subjects--Topical Terms:
240619
Electrical Engineering.
LC Class. No.: TK7874.58 / .P69 2010
Dewey Class. No.: 621.381548
The power of assertions in SystemVerilog
LDR
:00797nmm a2200253 a 4500
001
192361
003
DE-He213
005
20130314101601.0
006
m d
007
cr nn 008maaau
008
170314s2010 mau s 0 eng d
020
$a
9781441966001 (electronic bk.)
020
$a
9781441965998 (paper)
035
$a
978-1-4419-6600-1
040
$a
GP
$c
GP
041
0
$a
eng
050
4
$a
TK7874.58
$b
.P69 2010
082
0 4
$a
621.381548
$2
22
090
$a
TK7874.58
$b
.P887 2010
245
0 4
$a
The power of assertions in SystemVerilog
$h
[electronic resource] /
$c
by Eduard Cerny ... [et al.].
260
$a
Boston, MA :
$c
2010.
$b
Springer US,
300
$a
xvii, 544 p. :
$b
ill., digital ;
$c
24 cm.
650
2 4
$a
Electrical Engineering.
$3
240619
650
2 4
$a
Circuits and Systems.
$3
120841
650
1 4
$a
Engineering.
$3
120442
650
0
$a
Integrated circuits
$x
Verification
$x
Data processing.
$3
371273
650
0
$a
Verilog (Computer hardware description language)
$3
124567
700
1
$a
Cerny, Eduard.
$3
371272
710
2
$a
SpringerLink (Online service)
$3
120363
773
0
$t
Springer eBooks
856
4 0
$u
http://dx.doi.org/10.1007/978-1-4419-6600-1
950
$a
Engineering (Springer-11647)
筆 0 讀者評論
多媒體
評論
新增評論
分享你的心得
Export
取書館別
處理中
...
變更密碼
登入