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CMOS SRAM circuit design and paramet...

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CMOS SRAM circuit design and parametric test in nano-scaled technologies = process-aware SRAM design and test /

紀錄類型:	書目-電子資源 : 單行本
正題名/作者:	CMOS SRAM circuit design and parametric test in nano-scaled technologies/ by Andrei Pavlov, Manoj Sachdev.
其他題名:	process-aware SRAM design and test /
作者:	Pavlov, Andrei.
其他作者:	Sachdev, Manoj.
出版者:	Dordrecht :Springer Science + Business Media B.V, : 2008.,
面頁冊數:	212 p. :ill., digital ; : 24 cm.;
叢書名:	Frontiers in electronic testing ;
Contained By:	Springer eBooks
標題:	Metal oxide semiconductors, Complementary - Design. -
電子資源:	http://dx.doi.org/10.1007/978-1-4020-8363-1
ISBN:	9781402083631 (electronic bk.)

CMOS SRAM circuit design and parametric test in nano-scaled technologies = process-aware SRAM design and test /
Pavlov, Andrei.

CMOS SRAM circuit design and parametric test in nano-scaled technologiesprocess-aware SRAM design and test /[electronic resource] :by Andrei Pavlov, Manoj Sachdev. - Dordrecht :Springer Science + Business Media B.V,2008. - 212 p. :ill., digital ;24 cm. - Frontiers in electronic testing ;40.

ISBN: 9781402083631 (electronic bk.)Subjects--Topical Terms:

124631
Metal oxide semiconductors, Complementary
--Design.

Dewey Class. No.: 621.38152

CMOS SRAM circuit design and parametric test in nano-scaled technologies = process-aware SRAM design and test /
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